$chip(Z80)
$paginate
$pagewidth=150
$title(ST-8000A TEST ROUTINES)

;	title		ST-8000A Test Routines
;	source		STA.ASM		RD	

;	copyright (c) 1990 HAL COMMUNICATIONS CORP

;	release		V1.0	10-31-90
;			
;			V1.1			added debug option for continuous ram test  c routine changed 
;			
;			V1.2	 5-21-91	fixed problem created by writing wr5 in mc test
;			
;			V1.3    10-30-91	added mark 2000 space 3000 q 75 to status register test
;						added all front panel 7 segments on intensity check
;						corrected sequence for control signal test on port b contol lines

;.mcall	.mcz80
;	.mcz80


$subtitle(definitions)

; memory addresses

rom	equ	0000h			; start of rom
ram1	equ	8000h			; start of ram1
ram2	equ	9000h			; start of eerom

tmarklow	equ	0a000h		; tfsk mark low byte
tmarkhi		equ	0a001h		; tfsk mark hi byte
tspacelow	equ	0a002h		; tfsk space low byte
tspacehi	equ	0a003h		; tfsk space hi byte
rmarklow	equ	0a004h		; mclk low byte
rmarkhi		equ	0a005h		; mclk hi byte
rspacelow	equ	0a006h		; sclk low byte
rspacehi	equ	0a007h		; sclk hi byte

del0	equ	0e000h			; delay 1 and 2 switch
del1	equ	0f000h			; delay 3 and 4 switch


; i/o addresses

					; 8530
pbctrl  equ  	00h  			; port b control 
pbdata  equ  	01h  			; port b data
pactrl	equ	02h			; port a control
padata	equ	03h			; port a data

fpdata	equ	10h			; 8279 data
fpctrl	equ	11h			; 8279 control

timer1	equ	18h			; brg timer 1
timer2	equ	19h			; brg timer 2
timer3	equ	1ah			; brg timer3
timerm	equ	1bh			; brg mode register

adr	equ	20h			; sw4 unit address switch
br	equ	28h			; sw3 baud rate switch
level	equ	30h			; system status register 

out0	equ	38h			; output latch 0
out1	equ	39h			; output latch 1
out2	equ	3ah			; output latch 2

sanity	equ	3bh			; reset sanity timer

led0	equ	3ch			; 1st front panel led latch
led1	equ	3dh			; 2nd front panel led latch

rhslow	equ	3eh			; hsclk low byte
rhshi	equ	3fh			; hsclk hi byte



; system values

h9600   equ  	00h  			; high byte for baud rate divisor
l9600   equ  	12h  			; low byte ( 16 times actual rate )

h75	equ	14h			;13 high byte divisor for 75 baud
l75	equ	00h			;13 low byte divisor for 75 baud

osc1l	equ	55h			; 1st alternating synthesizer low byte
osc1h	equ	55h			; 1st alternating synthesizer hi byte
osc2l	equ	0aah			; 2nd alternating synthesizer low byte
osc2h	equ	2ah			; 2nd alternating synthesizer hi byte

m2000l	equ	40h			;13
m2000h	equ	1fh			;13 divisor for mark 2000

s3000l	equ	0e0h			;13
s3000h	equ	2eh			;13 divisor for space 3000

nmil	equ	0			; 1 ms nmi low byte divisor
nmih	equ	18h			; 1 ms nmi high byte divisor

t1m3	equ	36h			; timer 1 mode 3
t2m3	equ	76h			; timer 2 mode 3
t3m3	equ	0b6h			; timer 3 mode 3

txoff	equ	0fbh			; ani to latch 1 to set tx enable off
txon	equ	4h			; ori to latch 1 to set tx enable on
txnorm	equ	0f7h			; ani to latch 1 to set tx normal polarity
txrev	equ	8h			; ori to latch 1 to set tx reverse polarity

q75	equ	98h			;13 q setting for 75 baud

ckrefl	equ	6			; 819200 hz low byte divisor
ckrefh	equ	0			; 819200 hz high byte divisor

txrdy	equ	04h			; 8530 tx buffer empty
rxrdy	equ	1			; 8503 rx ready bit of rr1

fprdy	equ	80h			; 8279 ready to go
kbint	equ	10h			; keypad interrupt bit 4  0 = not int  1 = interrupt

clrfp	equ	0ceh			; set 8279 digits to all 0's

cr	equ	0dh			; carriage return
lf	equ	0ah			; line feed


	defseg	program,absolute
	seg	program

	org	ram1

stspace:	ds	100
stack		ds	1		; set aside stack area for interrupt checks
	

$subtitle(program start)

	org	0H
	jmp 	start			; jump arount interrupts


	org	38h	
int:					; maskable interrupt
	in	level			; read interrupt status
	ani	kbint			; check for keypad interrupt
	jnz	scc_int			; if not  interrupt was from scc

kb_int:
	in	fpdata			; read key code
	mov	b,a			; store keycod in return register
	lxi	d,100h	
kb_int1:
	dcx	d
	mov	a,e
	ora	d
	jnz	kb_int1

	jmp	int_end			; and leave the interrupt
scc_int:
	in	padata			; read the character

    	mvi  	a,1       		; write register 1
    	out  	pactrl
    	mvi  	a,00h     		; no rx or tx interrupts
    	out  	pactrl
	mvi	b,1			; set character received flag
int_end:
	ei
	reti				; return from interrupt


	org	66h			
nmi:					; non maskable interrupt
	inx	h			; increment 1ms counter
	retn				; return from nmi


start:	out	sanity			; reset sanity timer
	lxi	h,ram1
	mov	a,m			; check for the sanity test 
	cpi	'T'			; in progress in the 1st 4 
	jnz	start1			; locations in ram1
	inx	h
	mov	a,m
	cpi	'E'
	jnz 	start1
	inx	h
	mov	a,m
	cpi	'S'
	jnz	start1
	inx	h
	mov	a,m
	cpi	'T'
	jnz	start1

	lxi	h,santxt		; point to the test passed message
	lxi	x,start1		; set the return pointer
	jmp	sendmsg			; report sanity test ok
start1:
	im1				; set the interrupt mode
	lxi	sp,stack		; set the stack pointer

	mvi	a,0ffh
	out	led0			; turn off all the leds
	out	led1

	mvi	a,2ah
	out	fpctrl			; set the 8279 timing divisor
	mvi	a,08h		
	out	fpctrl			; set the 8279 mode
	mvi	a,0deh
	out	fpctrl			; clear the display and fifo
fp_loop:
	in	fpctrl			; read 8279 status
	ani	fprdy			; check for front panel ready after setup
	jnz	fp_loop			; wait for 8279 to process setup modes
fp0:
	lxi	x,st1			; set return point
	jmp	init_dsp		; init the 7 seg display field
	out 	sanity
	in	fpctrl
	ani	80h
st1:
	mvi	a,t1m3			; init the 8254 timer
	out	timerm			; set timer 1 for mode 3
	mvi	a,0ffh
	out	timer1			; set timer 1 as slow as we can go
	mvi	a,0ffh
	out	timer1

	mvi	a,t2m3			; init the 8254 timer
	out	timerm			; set timer 2 for mode 3
	mvi	a,0ffh
	out	timer2			; set timer 2 as slow as we can
	mvi	a,0ffh
	out	timer2

	mvi	a,t3m3			; init the nmi timer but dont start it
	out	timerm			; set timer 3 for mode 3

	mvi	a,1
	sta	tmarklow
	sta	tspacelow
	sta	rmarklow		; set all synthesizers as slow as we can go
	sta	rspacelow
	out	rhslow

	mvi	a,0
	sta	tmarkhi
	sta	tspacehi
	sta	rmarkhi
	sta	rspacehi
	out	rhshi
	
	lxi	x,main			; set return pointer
	jmp	csetup			; init the 8530

main:
	mvi	a,9eh
	out	fpctrl
	mvi	a,0c0h			; display a 0 in the channel indicator

main1:
	lxi	x,main2			; set return pointer
	jmp 	kbin			; wait for a test selection
	
main2:
	cpi	1			; check for id request
	jz	send_id			; if so  go to send test id

	cpi	2			; check for the ram test
	jz	mem			; if so  go to the memory test

	cpi	3			; check for the eerom test
	jz	erom			; if so  go to the eerom test

	cpi	4			; check for the switch test
	jz	switch			; if so  go to the switch test

	cpi	5			; check for the synthesizer test
	jz 	synth			; if so  go to the synthesizer test

	cpi	0fh			; check for sanity - nmi test
	jz	santst			; if so  go to the sanity timer test

	cpi	10h			; check for modem control signal test
	jz	mc			; if so  go to modem control signal test

	cpi	11h			; check for the status register test
	jz	stat			; if so  go to the status register test

	cpi	12h			; check for the nmi timer test
	jz	nmitest			; if so  go to the nmi timer test

	cpi	1fh			; check for send checksum command 
	jz	send_chksum		; calculate and send checksum

	cpi	20h			; check for the led test
	jz	ledt			; goto the led test

	cpi	21h			; check for the 7 segment test
	jz	segt			; goto the seven segment test

	cpi	22h			; check for keypad test 
	jz	keypadt			; goto the keypad test 

	cpi	23h			; check for bar graph test
	jz	bartest			; goto the bar graph test

	cpi	24h			;13 check for all segments on test
	jz	allon			;13 goto all segments on test 

	jmp	main			


send_id:

	lxi	y,main			; set the return pointer
	mvi	a,13h			; put version number into a
	jmp	outch			; send the version number
	

send_chksum:

	lxi	h,0			; load hl with start of rom
	mvi	c,80h			; put stop point in c
	mvi	b,0			; init checksum storage register
chksum1:
	out	sanity			; reset sanity timer
	mov	a,b			; get current checksum value
	add	m			; add rom byte to it
	mov	b,a			; save new checksum value
	inx	h			; increment memory pointer
	
	mov	a,h	
	cmp	c			; check for end of rom
	jnz	chksum1			; add entire contents of rom

	lxi	y,main			; set the return pointer
	mov	a,b			; get checksum value
	jmp	outch			; send the checksum value

chkval:		db	2ch


$subtitle(ram test)

;
; This test checks the 2k x 8 ram chip
;

mem:
	mvi	c,90h			; load stop point into c register
	lxi	h,ram1			; put start point in hl
	lxi	y,ram1f			; set test failed pointer in iy
	mvi	b,3			; load pattern counter in b register
	mvi	d,0			; set 1st test pattern to all 0's
mem2:
	mov	m,d			; write test pattern to memory
	out	sanity			; reset the sanity timer
	inx	h			; increment the memory pointer
	mov	a,h
	cmp	c			; check for the end of the ram chip
	jnz	mem2			; write the entire ram chip
	lxi	h,ram1			; reset pointer to the start of ram1
mem3:
	mov	a,m			; read back memory
	out	sanity			; reset the sanity timer
	cmp	d			; check against what was written
	jz	mem4
	pciy				; report failure if different
mem4:
	inx	h			; increment the memory pointer
	mov	a,h
	cmp	c			; check for the end of the chip
	jnz	mem3			; check the entire chip

	lxi	h,ram1			; reset the memory pointer
	dcr	b			; decrement the test counter
	jz	mem6			; goto the incrementing pattern on 0
	mov	a,b			; get test counter
	cpi	2			; check to see if we just did all 0's
	jnz	mem5			; if not  go to do alternating pattern
	mvi	d,0ffh			; if so   go to do all 1's 
	jmp	mem2	
mem5:
	mvi	d,55h			; set alternating pattern
	jmp	mem2	
mem6:
	mvi	d,0			; set for start of incrementing test
mem7:
	mov	m,d			; write memory location
	out	sanity			; reset the sanity timer
	inr	d			; increment test pattern
	mvi	a,0ffh
	cmp	d			; check for the end of the test pattern
	jnz	mem8
	mvi	d,0			; reset the test pattern if we get to ff
mem8:
	inx	h			; increment the memory pointer
	mov	a,h
	cmp	c			; check for the end of the ram chip
	jnz	mem7			; write the entire ram chip

	lxi	h,ram1			; reset the memory pointer
	mvi	d,0			; reset test pattern to start
mem9:
	mov	a,m			; read back memory
	out	sanity			; reset the sanity timer
	cmp	d			; check against what was written
	jz	mem10
	pciy				; report failure if different
mem10:
	inr	d			; increment the test pattern
	mvi	a,0ffh
	cmp	d			; check for the end of the pattern
	jnz	mem11
	mvi	d,0			; reset the pattern if we get to ff
mem11:
	inx	h			; increment the memory pointer
	mov	a,h			
	cmp	c			; check for the end of ram1
	jnz	mem9
	

	lxi	h,ram1ok		; point to test passed message
	jmp	mtend			
ram1f:
	lxi	h,ram1fail		; point to test failed message
mtend:
	lxi	x,main			; set return pointer
	jmp	sendmsg			; report ram1 test results

ram1ok:		db	'Ram Passed Test'
		db	-1
		db	0

ram1fail:	db	'Ram FAILED Test'
		db	-1
		db	0


$subtitle(eerom test)

; 
; This test checks the eerom
;

erom:

erom1:
	mvi	c,98h			; load stop point into c register
	lxi	h,ram2			; put start point in hl
	lxi	y,eromf			; set test failed pointer in iy
	mvi	b,3			; load pattern counter in b register
	mvi	d,0			; set 1st test pattern to all 0's
erom2:
	mov	m,d			; write test pattern to memory

	exx
	lxi	d,800h			; load delay value in d'
erom3:
	out	sanity			; reset the sanity timer
	dcx	d
	mov	a,d			; delay for at least 10ms after write
	ora	e
	jnz	erom3
	
	inx	h			; increment activity timer
	exx				; return to normal register set

	inx	h			; increment the memory pointer
	mov	a,h
	cmp	c			; check for the end of the ram chip
	jnz	erom2			; write the entire ram chip
	lxi	h,ram2			; reset pointer to the start of ram1
erom4:
	mov	a,m			; read back memory
	out	sanity			; reset the sanity timer
	cmp	d			; check against what was written
	jz	erom5
	pciy				; report failure if different
erom5:
	inx	h			; increment the memory pointer
	mov	a,h
	cmp	c			; check for the end of the chip
	jnz	erom4			; check the entire chip

	lxi	h,ram2			; reset the memory pointer
	dcr	b			; decrement the test counter
	jz	erom7			; goto the incrementin pattern on 0
	mov	a,b			; get test counter
	cpi	2			; check to see if we just did all 0's
	jnz	erom6			; if not  go to do alternating pattern
	mvi	d,0ffh			; if so   go to do all 1's 

	jmp	erom2	
erom6:
	mvi	d,55h			; set alternating pattern
	jmp	erom2	
erom7:
	mvi	d,0			; set for start of incrementing test
erom8:
	mov	m,d			; write memory location

	exx
	lxi	d,800h			; load delay value in d'
erom9:
	out	sanity			; reset the sanity timer
	dcx	d
	mov	a,d			; delay for at least 10ms after write
	ora	e
	jnz	erom9

	inx	h			; increment activity timer
	exx				; return to normal register set

	inr	d			; increment test pattern
	mvi	a,0ffh
	cmp	d			; check for the end of the test pattern
	jnz	erom10
	mvi	d,0			; reset the test pattern if we get to ff
erom10:
	inx	h			; increment the memory pointer
	mov	a,h
	cmp	c			; check for the end of the ram chip
	jnz	erom8			; write the entire ram chip

	lxi	h,ram2			; reset the memory pointer
	mvi	d,0			; reset test pattern to start
erom11:
	mov	a,m			; read back memory
	out	sanity			; reset the sanity timer
	cmp	d			; check against what was written
	jz	erom12
	pciy				; report failure if different
erom12:
	inr	d			; increment the test pattern
	mvi	a,0ffh
	cmp	d			; check for the end of the pattern
	jnz	erom13
	mvi	d,0			; reset the pattern if we get to ff
erom13:
	inx	h			; increment the memory pointer
	mov	a,h			
	cmp	c			; check for the end of ram2
	jnz	erom11
	

	lxi	h,eromok		; point to test passed message
	jmp	eromtend			
eromf:
	lxi	h,erom1fail		; point to test failed message
eromtend:
	lxi	x,erte1			; set return pointer 
	jmp	kbin			; wait for result command
erte1:
	lxi	x,main			; set return pointer
	jmp	sendmsg			; report ram1 test results


eromok:		db	'EEROM Passed Test'
		db	-1
		db	0

erom1fail:	db	'EEROM FAILED Test'
		db	-1
		db	0



$subtitle(switch test)

; This is the switch test routine.  It reads and reports changes
; to sw1, sw2, sw3 and sw4.  A keypress on the terminal will
; return the program to the main loop.

switch:

sw1:
	lda	del0			; read switch 1
	mov	b,a			; save sw1 setting in b register
	lda	del1			; read switch 2
	mov	c,a			; save sw2 setting in c register
	in	br			; read switch 3
	mov	d,a			; save sw3 setting in d register
	in	adr			; read switch 4 setting
	mov	e,a			; save sw4 setting in e register

	mov	a,b			; get switch 1 setting
	lxi	x,sw2			; set return pointer
	jmp	dspsw			; display switch setting
sw2:
	mov	a,c			; get switch 2 setting
	lxi	x,sw3			; set return pointer
	jmp	dspsw			; display switch setting
sw3:
	mov	a,d			; get switch 3 setting
	lxi	x,sw4			; set return pointer
	jmp	dspsw			; display switch setting
sw4:
	mov	a,e			; get switch 4 setting 
	lxi	x,sw5			; set return pointer
	jmp	dspsw			; display switch setting
sw5:
	mvi	a,-1			; load stop character
	lxi	y,sw6			; set return pointer
	jmp	outch			; send stop at end of status display
sw6:
	exx				; save primary register set values
	lxi	x,sw61
	jmp	delay			; delay for a bit
sw61:
	exx				; restore registers

	out	sanity			; reset the sanity timer
	in	pactrl			; read port a status
	ani	rxrdy			; check for a keypress
	jrz	sw7			; if not  go on
	in	padata			; if so   read the character
	jmp	main			; and return to the main options
sw7:
	lda	del0			; read sw1
	cmp	b			; check for a change
	jnz	sw1			; display the change

	lda	del1			; read sw2
	cmp	c			; check for a change
	jnz	sw1			; display the change

	in	br			; read sw3
	cmp	d			; check for a change
	jnz	sw1			; display the change
	
	in	adr			; read sw4
	cmp	e			; check for a change
	jnz	sw1			; display the change

	jmp	sw6			; repeat until a key is pressed


; This routine displays a 1 of 0 for the bits in the a register

dspsw:
	out	sanity			; reset sanity timer
	mov	l,a			; save setting in the l register
	mvi	a,20h			; put a space character in a
	lxi	y,dsw1			; set the return pointer
	jmp	outch			; send a space
dsw1:
	mvi	a,30h			; put a 0 into a
	bit	0,l			; test 1st switch position
	jrz	dsw2			; dont change if its a 0
	mvi	a,31h			; set to 1 if needed
dsw2:
	lxi	y,dsw3			; set the return pointer
	jmp	outch			; display setting
dsw3:
	mvi	a,30h			; put a 0 into a
	bit	1,l			; test 2nd switch position
	jrz	dsw4			; dont change if its a 0
	mvi	a,31h			; set to 1 if needed
dsw4:
	lxi	y,dsw5			; set the return pointer
	jmp	outch			; display the setting
dsw5:
	mvi	a,30h			; put a 0 into a
	bit	2,l			; test 3rd switch position
	jrz	dsw6			; dont change if its a 0
	mvi	a,31h			; set to 1 if needed
dsw6:
	lxi	y,dsw7			; set return pointer
	jmp	outch			; display setting
dsw7:
	mvi	a,30h			; put a 0 into a
	bit	3,l			; test 4th switch position
	jrz	dsw8			; dont change if its a 0
	mvi	a,31h			; set to 1 if needed
dsw8:
	lxi	y,dsw9			; set return pointer
	jmp	outch			; display setting
dsw9:
	mvi	a,30h			; put a 0 into a
	bit	4,l			; test 5th switch position
	jrz	dsw10			; dont change if its a 0
	mvi	a,31h			; set to 1 if needed
dsw10:
	lxi	y,dsw11			; set return pointer
	jmp	outch			; display setting
dsw11:
	mvi	a,30h			; put a 0 into a
	bit	5,l			; test 6th switch position
	jrz	dsw12			; dont change if its a 0
	mvi	a,31h			; set to 1 if needed
dsw12:
	lxi	y,dsw13			; set return pointer
	jmp	outch			; display setting
dsw13:
	mvi	a,30h			; put a 0 into a
	bit	6,l			; test 7th switch position
	jrz	dsw14			; dont change if its a 0
	mvi	a,31h			; set to 1 if needed
dsw14:
	lxi	y,dsw15			; set return pointer
	jmp	outch			; display setting
dsw15:
	mvi	a,30h			; put a 0 into a
	bit	7,l			; test 8th switch position
	jrz	dsw16			; dont change if its a 0
	mvi	a,31h			; set to 1 if needed
dsw16:
	lxi	y,dsw17			; set return pointer
	jmp	outch			; display setting
dsw17:
	mvi	a,20h			; put a space character in a
	lxi	y,dsw18			; set the return pointer
	jmp	outch			; send a space
dsw18:

	pcix				; return



$subtitle(synthesizer test)

;
; This is the synthesizer test 
;
 
synth:

sy1:
	mvi	a,0
	ori	txrev			; set latch to get txd = 0
	out	out1

	mvi	a,osc1l
	sta	tmarklow		; set mark tone tfsk to 1st test value
	mvi	a,osc1h
	sta	tmarkhi

	lxi	h,symes1		; point to the 1st test message
	lxi	x,sy2			; set the return pointer
	jmp	sendmsg			; send the 1st test message
sy2:
	lxi	x,sy3			; set return pointer
	jmp	kbin			; wait for a keypress
sy3:
	mvi	a,osc2l
	sta	tmarklow		; set mark tone tfsk to 2nd test value	
	mvi	a,osc2h
	sta	tmarkhi

	lxi	h,symes2		; point to the 2nd test message
	lxi	x,sy4			; set the return pointer
	jmp	sendmsg			; send the 2nd test message
sy4:
	lxi	x,sy5			; set return pointer
	jmp	kbin			; wait for a keypress
sy5:	
	mvi	a,4
	ori	txrev			; set latch to get txd = 1
	out	out1

	mvi	a,osc1l
	sta	tspacelow		; set space tone tfsk to 1st test value
	mvi	a,osc1h
	sta	tspacehi

	lxi	h,symes1		; point to the 1st test message
	lxi	x,sy6			; set the return pointer
	jmp	sendmsg			; send the 1st test message
sy6:
	lxi	x,sy7			; set return pointer
	jmp	kbin			; wait for a keypress
sy7:	
	mvi	a,osc2l
	sta	tspacelow		; set space tone tfsk to 2nd test value	
	mvi	a,osc2h
	sta	tspacehi

	lxi	h,symes2		; point to the 2nd test message
	lxi	x,sy8			; set the return pointer
	jmp	sendmsg			; send the 2nd test message
sy8:
	lxi	x,sy9			; set return pointer
	jmp	kbin			; wait for a keypress
sy9:	
	mvi	a,osc1l
	sta	rmarklow		; set mark tone mclk to 1st test value
	mvi	a,osc1h
	sta	rmarkhi

	lxi	h,symes3		; point to the 3rd test message
	lxi	x,sy10			; set the return pointer
	jmp	sendmsg			; send the 3rd test message
sy10:
	lxi	x,sy11			; set return pointer
	jmp	kbin			; wait for a keypress
sy11:
	mvi	a,osc2l
	sta	rmarklow		; set mark tone mclk to 2nd test value	
	mvi	a,osc2h
	sta	rmarkhi

	lxi	h,symes4		; point to the 4th test message
	lxi	x,sy12			; set the return pointer
	jmp	sendmsg			; send the 4th test message
sy12:
	lxi	x,sy13			; set return pointer
	jmp	kbin			; wait for a keypress
sy13:	
	mvi	a,osc1l
	sta	rspacelow		; set space tone sclk to 1st test value
	mvi	a,osc1h
	sta	rspacehi

	lxi	h,symes5		; point to the 5th test message
	lxi	x,sy14			; set the return pointer
	jmp	sendmsg			; send the 5th test message
sy14:
	lxi	x,sy15			; set return pointer
	jmp	kbin			; wait for a keypress
sy15:	
	mvi	a,osc2l
	sta	rspacelow		; set space tone sclk to 2nd test value	
	mvi	a,osc2h
	sta	rspacehi

	lxi	h,symes6		; point to the 6th test message
	lxi	x,sy16			; set the return pointer
	jmp	sendmsg			; send the 6th test message
sy16:
	lxi	x,sy17			; set return pointer
	jmp	kbin			; wait for a keypress
sy17:	
	mvi	a,osc1l
	out	rhslow			; set hsclk to 1st test value
	mvi	a,osc1h
	out	rhshi

	lxi	h,symes7		; point to the 7th test message
	lxi	x,sy18			; set the return pointer
	jmp	sendmsg			; send the 7th test message
sy18:
	lxi	x,sy19			; set return pointer
	jmp	kbin			; wait for a keypress
sy19:	
	mvi	a,osc2l
	out	rhslow			; set hsclk to 2nd test value	
	mvi	a,osc2h
	out	rhshi

	lxi	h,symes8		; point to the 8th test message
	lxi	x,sy20			; set the return pointer
	jmp	sendmsg			; send the 8th test message
sy20:
	lxi	x,main			; set the return pointer
	jmp	kbin			; wait for keypress and return to main


symes1:	db	'Measure 273062 Hz At TP1'
	db	-1
	db	0

symes2:	db	'Measure 136525 Hz At TP1'
	db	-1
	db	0

symes3:	db	'Measure 273062 Hz At TP2'
	db	-1
	db	0

symes4:	db	'Measure 136525 Hz At TP2'
	db	-1
	db	0

symes5:	db	'Measure 273062 Hz At TP3'
	db	-1
	db	0

symes6:	db	'Measure 136525 Hz At TP3'
	db	-1
	db	0

symes7:	db	'Measure 273062 Hz At TP4'
	db	-1
	db	0

symes8:	db	'Measure 136525 Hz At TP4'
	db	-1
	db	0



$subtitle(sanity timer test)

santst:
	lxi	h,ram1
	mvi	m,'T'
	inx	h
	mvi	m,'E'			; store test in progress message
	inx	h
	mvi	m,'S'
	inx	h
	mvi	m,'T'
s0:
	in	pactrl
	ani	rxrdy			; repeat this loop until reset or
	jz	s0			; keypress

	lxi	h,ram1
	mvi	m,0
	inx	h
	mvi	m,0			; erase test message
	inx	h
	mvi	m,0
	inx	h
	mvi	m,0
	jmp	main			; return to main options

santxt:		db	'Sanity Timer Passed Test'
		db	-1
		db	0


$subtitle(modem control test)

mc:
	mvi	a,1		
	out	pactrl			; write register 1
	mvi	a,10h
	out	pactrl			; enable interrupt on rx character
	mvi	b,0			; set character received flag
	ei				; enable interrupts
	
mc0:
	mov	a,b			; get character flag
	cpi	0			; non-zero means a character was received
	jnz	mc2			; stop this test if so

	mvi	a,0ffh
	out	out2
	out	out0			; turn off all the leds
	mvi	a,1
	out	out1			; turn off divc led also

	lxi	x,mc10			; set return pointer
	mvi	a,7fh			; turn on mql 
	out	out0
	jmp 	delay			; delay for a bit
mc10:
	lxi	x,mc11			; set return pointer
	mvi	a,0bfh			; turn on mq3
	out	out0
	jmp	delay			; delay for a bit
mc11:
	lxi	x,mc12			; set the return pointer 
	mvi	a,0dfh			; turn mq2 on
	out	out0
	jmp	delay			; delay for a bit
mc12:
	lxi	x,mc13			; set the return pointer
	mvi	a,0efh			; turn mq1 on
	out	out0
	jmp	delay			; delay for a bit
mc13:
	mov	a,b			; get character flag
	cpi	0			; non-zero means a character was received
	jnz	mc2			; stop this test if so

	lxi	x,mc14			; set return pointer
	mvi	a,0f7h			; turn on sql 
	out	out0
	jmp 	delay			; delay for a bit
mc14:
	lxi	x,mc15			; set return pointer
	mvi	a,0fbh			; turn on sq3
	out	out0
	jmp	delay			; delay for a bit
mc15:
	lxi	x,mc16			; set the return pointer 
	mvi	a,0fdh			; turn sq2 on
	out	out0
	jmp	delay			; delay for a bit
mc16:
	lxi	x,mc17			; set the return pointer
	mvi	a,0feh			; turn sq1 on
	out	out0
	jmp	delay			; delay for a bit
mc17:
	mov	a,b			; get character flag
	cpi	0			; non-zero means a character was received
	jnz	mc2			; stop this test if so

	lxi	x,mc20			; set return pointer
	mvi	a,7fh			; turn on amhc 
	out	out2
	mvi	a,0ffh
	out	out0			; turm sq1 off
	jmp 	delay			; delay for a bit
mc20:
	lxi	x,mc21			; set return pointer
	mvi	a,0bfh			; turn on hsls
	out	out2
	jmp	delay			; delay for a bit
mc21:
	lxi	x,mc22			; set the return pointer 
	mvi	a,0dfh			; turn on dma
	out	out2
	jmp	delay			; delay for a bit
mc22:
	lxi	x,mc23			; set the return pointer
	mvi	a,0efh			; turn on dnb
	out	out2
	jmp	delay			; delay for a bit
mc23:
	mov	a,b			; get character flag
	cpi	0			; non-zero means a character was received
	jnz	mc2			; stop this test if so

	lxi	x,mc24			; set return pointer
	mvi	a,0f7h			; turn on chsel
	out	out2
	jmp 	delay			; delay for a bit
mc24:
	lxi	x,mc25			; set return pointer
	mvi	a,0fbh			; turn on mute
	out	out2
	jmp	delay			; delay for a bit
mc25:
	lxi	x,mc26			; set the return pointer 
	mvi	a,0fdh			; turn on bcb
	out	out2
	jmp	delay			; delay for a bit
mc26:
	lxi	x,mc27			; set the return pointer
	mvi	a,0feh			; turn on bca
	out	out2
	jmp	delay			; delay for a bit
mc27:
	lxi	x,mc28			; set return pointer 
	mvi	a,0ffh			; turn bca off
	out	out2
	mvi	a,0			; turn divc on
	out	out1
	jmp 	delay
mc28:
	mvi	a,1
	out	out1			; turn divc off
	lxi	x,mc29
	mvi	a,5			; select write register 5 
	out	pactrl
	mvi	a,6ah			;12 set dtr output low on port a
	out	pactrl
	jmp	delay
mc29:
	lxi	x,mc30
	mvi	a,5			; select write register 5
	out	pactrl
	mvi	a,0eah			;12 set dtr output high on port a
	out	pactrl
	jmp	delay
mc30:
	lxi	x,mc31
	mvi	a,5			; select write register 5
	out	pbctrl
	mvi	a,68h			;12 set rts output low on port b
	out	pbctrl
	jmp	delay
mc31:
	lxi	x,mc32
	mvi	a,5			; select write register 5
	out	pbctrl
	mvi	a,6ah			;12 set rts output high on port b
	out	pbctrl
	jmp	delay
mc32:
	lxi	x,mc33
	mvi	a,5			; select write register 5 
	out	pbctrl
	mvi	a,0eah			;12 set dtr output high on port b
	out	pbctrl
	jmp	delay
mc33:
	lxi	x,mc34
	mvi	a,5			; select srite register 5
	out	pbctrl
	mvi	a,6ah			;12 set dtr output low on port b
	out	pbctrl
	jmp	delay
mc34:
	mov	a,b			; get character flag
	cpi	0			; non-zero means a character was received
	jz	mc0			; stop this test if so
mc2:
	di				; disable interrupts
	jmp	main			; return to the main options


$subtitle(status register test)

; This routine controls the status register test

stat:
	mvi	a,q75			;13 get q value for 75 baud
	out	out0			;13 set q latch for 75 baud

	mvi	a,m2000l		;13 get mark 2000 low byte
	sta	rmarklow		;13 set low byte divisor latch
	mvi	a,m2000h		;13 get mark 2000 high byte
	sta	rmarkhi			;13 set high byte divisor latch

	mvi	a,s3000l		;13 get space 3000 low byte divisor
	sta	rspacelow		;13 set low byte divisor latch
	mvi	a,s3000h		;13 get space 3000 high byte divisor
	sta	rspacehi		;13 set high byte divisor latch

	mvi	a,l75			;13 get 75 baud rate low divisor
	out	timer1			;13 write 8254
	mvi	a,h75			;13 get 75 baud rate high divisor
	out	timer1			;13 write 8254

	jmp	send_ctrl		; send and save current status values
stat1:
	lxi	h,1000h			; load a delay value into the hl register
stat2:
	out	sanity			; reset the sanity timer
	dcx	h			
	mov	a,h			; delay to debounce changes
	ora	l
	jnz	stat2
stat3:
	out	sanity			; reset the sanity timer
	in	pactrl			; read control port status
	ani	rxrdy			; check for a keypress
	jnz	stat4			; if so  we are done

	in	level			; read status register
	cmp	b			; check for a change
	jnz	send_ctrl		; report and save change

	in	pactrl			; read port a status
	ani	20h			; isolate cts a bit
	cmp	c			; check for a change
	jnz	send_ctrl		; report and save change

	in	pbctrl			; read port b status
	ani	20h			; isolate cts b bit
	cmp	d			; check for a change
	jnz	send_ctrl		; send and save change

	jmp	stat3
stat4:
	in	padata			; read the data at the control port
	jmp	main			; return to the main loop


; This routine sends the data on status conditions for the stat test routine

send_ctrl:
	out 	sanity			; reset the sanity timer
	in	level			; read the current value of the status register
	mov	b,a			; save that value in b
	lxi	x,sctr1			; set the return pointer
	jmp	dspsw			; display the current setting
sctr1:
	in	pactrl			; read port a status
	ani	20h			; isolate the cts a bit
	mov	c,a			; save cts a status

	mvi	a,30h			; start with a zero
	bit	5,c			; test status of cts bit
	jrz	sctr2			; 0 = send 30h 
	mvi	a,31h			; 1 = send 31h
sctr2:
	lxi	y,sctr3			; set return pointer 
	jmp	outch			; send cts a status
sctr3:
	in	pbctrl			; read port b status
	ani	20h			; isolate the cts b bit
	mov	d,a			; save cts b status

	mvi	a,30h			; start with a zero
	bit	5,d			; test status of cts bit
	jrz	sctr4			; 0 = send 30h 
	mvi	a,31h			; 1 = send 31h
sctr4:
	lxi	y,sctr5			; set return pointer 
	jmp	outch			; send cts a status
sctr5:
	mvi	a,-1			; load stop character
	lxi	y,stat1			; set return pointer
	jmp	outch			; send stop at end of status display



$subtitle(nmi test)

; This routine controls the nmi timer test

nmitest:
	lxi	h,0			; set the test flag to 0

	mvi	a,nmil
	out	timer3
	mvi	a,nmih			; load nmi timer value
	out	timer3

	mvi	a,80h
	out	out1			; enable nmi
nmi1:
	out	sanity			; reset the sanity timer
	mov	a,h			
	cpi	0			; check for nmi flag being set by interrupt
	jnz	nmiok			; non-zero value means timer is ok

	in	pactrl			; read control port status
	ani	rxrdy			; check for a keypress
	jz	nmi1			; loop here until test is done

	mov	a,l			; read low byte of flag
	cpi	0			; see if timer went off at all
	jz	nmifail			; hl = 0 means timer never went off

	mvi	a,0h
	out	out1			; disable nmi
	lxi	h,nmis			; otherwise test was stopped by the 
	lxi	x,nmiend		; operator before it completed
	jmp	sendmsg			; so report that
nmifail:
	lxi	h,nmif			; load hl with message pointer
	lxi	x,nmiend		; set the return pointer
	jmp	sendmsg			; report the test failed
nmiok:
	mvi	a,0h
	out	out1			; disable nmi
	lxi	h,nmip			; load hl with message pointer
	lxi	x,nmiend		; set the return pointer
	jmp	sendmsg			; report test passed

nmiend:
	mvi	a,0h
	out	out1			; disable nmi
	mvi	a,t3m3			; init the nmi timer but dont start it
	out	timerm			; set timer 3 for mode 3
	jmp	main

	
nmis:	db	'NMI Stopped'
	db	-1
	db	0

nmif:	db	'NMI FAILED Test'
	db	-1
	db	0

nmip:	db	'NMI Passed Test'
	db	-1
	db	0


$subtitle(led test)


;
; This is the led test
;

ledt:
	mvi	a,7fh
	out	led0			; turn on the mark led
	lxi	x,lt1
	jmp	delay2
lt1:
	mvi	a,0bfh
	out	led0			; turn on the center led
	lxi 	x,lt2
	jmp	delay2
lt2:
	mvi	a,0dfh
	out	led0			; turn on the space led
	lxi	x,lt3
	jmp	delay2
lt3:
	mvi	a,0efh
	out	led0			; turn on the shift led
	lxi	x,lt4
	jmp	delay2
lt4:
	mvi	a,0f7h		
	out	led0			; turn on the sync led
	lxi	x,lt5
	jmp	delay2
lt5:
	mvi	a,0fbh		
	out	led0			; turn on the fsk led
	lxi	x,lt6
	jmp	delay2
lt6:
	mvi	a,0ffh
	out	led0
	mvi	a,7fh		
	out	led1			; turn on the regen led
	lxi	x,lt7
	jmp	delay2
lt7:	
	mvi	a,0ffh
	out	led1
	mvi	a,0fdh		
	out	led0			; turn on the mark only led
	lxi	x,lt8
	jmp	delay2
lt8:	
	mvi	a,0feh		
	out	led0			; turn on the space only led
	lxi	x,lt9
	jmp	delay2
lt9:
	mvi	a,0ffh
	out	led0
	mvi	a,0bfh		
	out	led1			; turn on the amh led
	lxi	x,lt10
	jmp	delay2
lt10:
	mvi	a,0dfh		
	out	led1			; turn on the hold led
	lxi	x,lt11
	jmp	delay2
lt11:
	mvi	a,0efh		
	out	led1			; turn on the rev led
	lxi	x,lt12
	jmp	delay2
lt12:
	mvi	a,0f7h		
	out	led1			; turn on the enter led
	lxi	x,lt13
	jmp	delay2
lt13:
	mvi	a,0fbh		
	out	led1			; turn on the div led
	lxi	x,lt14
	jmp	delay2
lt14:
	mvi	a,0fdh		
	out	led1			; turn on the mute led
	lxi	x,lt15
	jmp	delay2
lt15:
	mvi	a,0feh		
	out	led1			; turn on the remote led
	lxi	x,lt16
	jmp	delay2
lt16:
	lxi	x,ledt
	mvi	a,0ffh
	out	led1			; turn all the leds off
	jmp	delay2



$subtitle(7 segment test)

; 
; This is the 7-segment test
;

segt:
	mvi	a,7fh
	lxi	x,segt2
	jmp	wrtdsp			; write all the segments
segt2:
	lxi	x,segt3
	jmp	delay2
segt3:
	mvi	a,0bfh
	lxi	x,segt4
	jmp	wrtdsp			; write all the segments
segt4:
	lxi	x,segt5
	jmp	delay2
segt5:
	mvi	a,0dfh
	lxi	x,segt6
	jmp	wrtdsp			; write all the segments
segt6:
	lxi	x,segt7
	jmp	delay2
segt7:
	mvi	a,0efh
	lxi	x,segt8
	jmp	wrtdsp			; write all the segments
segt8:
	lxi	x,segt9
	jmp	delay2
segt9:
	mvi	a,0f7h
	lxi	x,segt10
	jmp	wrtdsp			; write all the segments
segt10:
	lxi	x,segt11
	jmp	delay2
segt11:
	mvi	a,0fbh
	lxi	x,segt12
	jmp	wrtdsp			; write all the segments
segt12:
	lxi	x,segt13
	jmp	delay2
segt13:
	mvi	a,0fdh
	lxi	x,segt14
	jmp	wrtdsp			; write all the segments
segt14:
	lxi	x,segt15
	jmp	delay2
segt15:
	mvi	a,0feh
	lxi	x,segt16
	jmp	wrtdsp			; write all the segments
segt16:
	lxi	x,segt
	jmp	delay2


; This routine writes the value in the b register to all the seven
; displays on the front panel board


wrtdsp:
	mov	b,a			; save byte to write
	mvi	c,90h			; put start segment address in c
wrtdsp1:
	mov	a,c	
	out	fpctrl			; tell 8279 which display to write
	mov	a,b			; send pattern to write to the 8279
	out	fpdata
	
	inr	c			; increment address storage
	mov	a,c
	cpi	0a0h			; range to write is 90 to 9f
	jnz	wrtdsp1

	pcix

$subtitle(keypad test)

;
; This routine tests the front panel keypad input
;

keypadt:

	mvi	b,0			; zero the scan code storage
	ei				; enable the maskable interrupt
kpt1:
	out	sanity			; reset the sanity timer
	mov	a,b			; check the scan code storage
	cpi	0			; 0 = no keypress yet
	jz	kpt3			; if 0 go on
kpt2:
	out	sanity			; reset the sanity timer
	in	pactrl			; get remote port status
	ani	txrdy			; check to see if we can send the code
	jrz	kpt2			; wait for tx ready
	mov	a,b			; get the scan code
	out	padata			; and send the code to the remote port
	mvi	b,0			; reset scan code storage
kpt3:
	in	pactrl			; read remote port status
	ani	rxrdy			; check for rx character
	jz	kpt1			; repeat loop until a character is sent to us
	
	in	padata			; read the remote port character
	di				; disable maskable interrupt
	jmp	main			; return to main program loop


$subtitle(bar graph test)

; This test controls the bar graph test

bartest:
	mvi	a,0
	out	out2			; make sure mute is low
	ori	txrev
	out	out1			; set txd low

	mvi	a,osc1l
	sta	tmarklow		; set low byte for mark and space
	sta	tspacelow		; synthesizers

	mvi	a,osc1h
	sta	tmarkhi			; set high byte for mark and space
	sta 	tspacehi		; synthesizers to generate tfsk clock
bar1:
	lxi	d,200h			; load a delay time into de
bar2:
	out	sanity			; reset the sanity timer
	dcx	d			; decrement the timer
	mov	a,e
	ora	d			; wait till de = 0
	jnz	bar2

	mvi	a,4
	ori	txrev			; set txd high
	out	out1

	lxi	d,200h			; load a delay time into de
bar3:
	out	sanity			; reset the sanity timer
	dcx	d			; decrement the timer
	mov	a,e
	ora	d			; wait till de = 0
	jnz	bar3

	mvi	a,0
	ori	txrev			; set txd low
	out	out1

	in	pactrl
	ani	rxrdy			; check for a stop command
	jz	bar1

	in	padata			; read in the character
	jmp	main

$subtitle(all segments on test)

;13 This routine turns all the front panel 7 segment elements on 

allon:					;13
	mvi	a,0			;13 
	lxi	x,allon1		;13 turn all the segments on
	jmp	wrtdsp			;13
allon1:					;13
	out	sanity			;13 reset the sanity timer
	in	pactrl			;13 read remote port status
	ani	rxrdy			;13 check for a character
	jz	allon1			;13 wait for an rx character

	in	padata			;13 clear the rx status
	lxi	x,main			;13 set the return pointer
	jmp	init_dsp		;13 reset 7 segment display


$subtitle(subroutines)


;
; This is a general purpose delay routine
;

delay:
	lxi	d,8000h			; load delay value in d
d1:
	dcx	d
	out	sanity			; reset sanity timer
	mov	a,d			; decrement down to 0
	ora	e
	jnz	d1
	pcix				; return



; Front panel led and seven segment test delay rouitne with
; check for keypress to stop the test 


delay2:
	lxi	d,0f000h		; load delay value in d
d2:
	dcx	d
	out	sanity			; reset sanity timer
	mov	a,d			; decrement down to 0
	ora	e
	jnz	d2

	in	pactrl			; read remote port status
	ani	rxrdy			; check to see if we received a character
	jnz	d3			; 1 = character received
	pcix				; if no character  return to calling routine
d3:
	in	padata			; read in the character
	lxi	x,main			; set return pointer
	jmp	init_dsp		; reset 7 segment display message


;
; this routine sets up the 8530 port a for async operation
;

 
csetup:
    	mvi  	a,9       		; write register 9
    	out  	pactrl
    	mvi  	a,0c8h   		; force a hardware reset
    	out  	pactrl
    
    	lxi  	d,8000h

csetup1:
    	out 	sanity
    	dcx  	d
    	mov  	a,e       		; pause for a reset
    	ora  	d
    	jnz  	csetup1

    	mvi  	a,4       		; write register 4
    	out  	pactrl
    	mvi  	a,44h     		; set the 8530 for async mode
    	out  	pactrl

    	mvi  	a,3       		; write register 3
    	out  	pactrl
   	mvi  	a,0c1h    		; set up the receiver
    	out  	pactrl
    
    	mvi  	a,5       		; write register 5
    	out  	pactrl
    	mvi  	a,0eah    		; set up the transmitter
    	out  	pactrl
    
    	mvi  	a,11      		; write register 11
    	out  	pactrl
    	mvi  	a,56h     		; set the clock sources
    	out  	pactrl
    
    	mvi  	a,12      		; write register 12
   	out  	pactrl
    	mvi  	a,l9600
    	out  	pactrl     		; set divisor low byte for 9600
    	mvi  	a,13      		; write register 13
    	out  	pactrl
    	mvi  	a,h9600
    	out  	pactrl     		; set divisor high byte for 9600 

	out	sanity
    	mvi  	a,14      		; write register 14
    	out  	pactrl
    	mvi  	a,2       		; enable the baud rate generator
    	out  	pactrl
    
    	mvi  	a,14      		; write register 14 again
    	out  	pactrl	
    	mvi  	a,0c3h     
   	out  	pactrl
    
    	mvi  	a,15      		; write register 15
    	out  	pactrl
    	mvi  	a,0       		; disable external interrupts
    	out  	pactrl
    
    	mvi  	a,11      		; write register 11
    	out  	pbctrl
    	mvi  	a,56h     		; set the clock sources
    	out  	pbctrl
    
    	mvi  	a,12      		; write register 12
   	out  	pbctrl
    	mvi  	a,0ffh
    	out  	pbctrl     		; set divisor low byte for slow clock

    	mvi  	a,13      		; write register 13
    	out  	pbctrl
    	mvi  	a,0ffh
    	out  	pbctrl     		; set divisor high byte for slow clock 

	out	sanity
    	mvi  	a,14      		; write register 14
    	out  	pbctrl
    	mvi  	a,2       		; enable the baud rate generator
    	out  	pbctrl
    
    	mvi  	a,14      		; write register 14 again
    	out  	pbctrl	
    	mvi  	a,0c3h     
   	out  	pbctrl
    
    	mvi  	a,15      		; write register 15
    	out  	pbctrl
    	mvi  	a,0       		; disable external interrupts
    	out  	pbctrl

    	mvi  	a,1       		; write register 1
    	out  	pactrl
    	mvi  	a,00h     		; no rx or tx interrupts
    	out  	pactrl

	pcix				; return



; This routine reads a character from the 8530 port a.
; We stay in this routine until a character is received.
; The character is returned in the a register.


kbin:
	out	sanity		; reset the sanity timer
	in	pactrl		; read the input buffer
	ani	rxrdy		; wait until ready
	jrz	kbin		; loop until a character is received

	in	padata		; read in the character
	pcix			; return


; This routine sends a message string pointed to by the hl registers
; to the 8530 port a.  A 0 character is the string stop character.              

sendmsg:
	out	sanity		; reset the sanity timer
	in	pactrl		; read the status
	ani	txrdy		; wait till ready
	jrz	sendmsg		; loop till ready to transmit

	mov	a,m		; get a message character
	cpi	0		; check for the stop character
	jz	sendend		; if so  we are done

	out	padata		; if not  send the character
	inx	h		; increment the message pointer
	jmp	sendmsg		; go back to send another

sendend:
	pcix			; return



; This routine sends a single character to the 8530 port a.                
; The character to send is passed to this routine in the a 
; register and temporarily stored in the h register.

outch:  
	mov	h,a		; save the character to send
outch1:
	out	sanity		; reset the sanity timer
	in	pactrl		; read the status
	ani	txrdy		; wait till ready
	jrz	outch1 		; loop till ready to transmit

	mov	a,h		; get the character to send
	out	padata		; if not  send the character

	pciy			; return


;
; This routine puts the starting message on the 7-seg displays
;

init_dsp:
	mvi	a,90h
	out	fpctrl
	mvi	a,0bfh			; display a dash 
	out	fpdata

	mvi	a,94h
	out	fpctrl			; display a dash
	mvi	a,0bfh
	out	fpdata

	mvi	a,93h
	out	fpctrl
	mvi	a,89h			; display H
	out	fpdata

	mvi	a,92h
	out	fpctrl
	mvi	a,88h			; display A
	out	fpdata

	mvi	a,91h
	out	fpctrl
	mvi	a,0c7h			; display L
	out	fpdata

	mvi	a,99h
	out	fpctrl
	mvi	a,80h			; display 0
	out	fpdata

	mvi	a,98h
	out	fpctrl
	mvi	a,0c0h			; display 0
	out	fpdata

	mvi	a,97h
	out	fpctrl
	mvi	a,0c0h			; display 0
	out	fpdata

	mvi	a,9ah
	out	fpctrl			; display a dash
	mvi	a,0bfh
	out	fpdata

	mvi	a,9bh
	out	fpctrl			; display a dash
	mvi	a,0bfh
	out	fpdata

	mvi	a,9ch
	out	fpctrl			; display a dash
	mvi	a,0bfh
	out	fpdata

	mvi	a,9dh
	out	fpctrl			; display a dash
	mvi	a,0bfh
	out	fpdata
	
	mvi	a,96h
	out	fpctrl
	mvi	a,0c0h			; display 0
	out	fpdata
	
	mvi	a,95h
	out	fpctrl
	mvi	a,88h			; display A
	out	fpdata
	
	mvi	a,9eh
	out	fpctrl
	mvi	a,0c0h			; display 0
	out	fpdata
	
	pcix


	end